1. Field of the Invention
The present invention relates to a semiconductor memory device such as an EEPROM or a ROM capable of writing and erasing data electrically, which has an electrical measurement function that enables external and direct measurement of characteristics of a nonvolatile memory cell.
2. Description of the Related Art
Conventionally, individual memory cells in the semiconductor memory device are measured externally and directly for evaluating characteristics of the memory cells of a nonvolatile semiconductor memory device such as an EEPROM.
For instance, in the case of an EEPROM, when data is erased from or written in a memory cell M, electric characteristics such as a threshold voltage Vth of the memory cell M in each state are evaluated by setting a gate of the memory cell M from an external terminal 100 via a word line W1 in a variable manner as illustrated in FIG. 10 (in the case of erasing data) or in FIG. 11 (in the case of writing data) (see, for example, Japanese Patent Application Laid-open No. Hei 11-16399).
In the case of evaluating characteristics of the memory cell M from which data is erased as illustrated in FIG. 10, address data is input externally so that an X decoder 101 and a Y decoder 102 control an X switch voltage switching control circuit 105 and a Y switch 103 for selecting the memory cell M.
In the case of a normal mode in which a test signal T1 is not input, the X switch voltage switching control circuit 105 delivers a signal of the X decoder 101 to the word line W1. In the case of a test mode in which the test signal T1 is input, the X switch voltage switching control circuit 105 delivers a voltage of a fixed power supply 500 from the external terminal 100 to the word line W1.
Further, when a test signal T2 is input, a switch SW1 and a switch SW2 are switched so that a bit line B1 (i.e., drain of a selected memory cell M) is directly connected to an external terminal 106.
Thus, a value of current flowing from an external power supply 300 to the memory cell M is measured by an ammeter 201. The measured current value is compared with an expected value of current that is set in advance, and characteristics of the memory cell M are evaluated.
On the other hand, if the threshold voltage Vth of the memory cell becomes a positive potential when data is written, the gate of the memory cell M is set from the external terminal 100 via the word line W1 in a variable manner as illustrated in FIG. 11, similarly to FIG. 10.
Further, also in FIG. 11, similarly to FIG. 10, address data is input externally so that the X decoder 101 and the Y decoder 102 control the X switch voltage switching control circuit 105 and the Y switch 103 for selecting the memory cell M.
In addition, the test signal T1 is input and a voltage of a variable power supply 200 is applied to the gate of the memory cell M via the external terminal 100, but the test signal T2 is not input. Therefore, the switch SW1 connects the bit line B1 to a positive terminal of a comparator 107 while the switch SW2 connects an output terminal of the comparator 107 to the external terminal 106. Thus, a drain of the memory cell M is supplied with a reference current Iref from a constant current circuit 104.
As a result, the comparator 107 compares a drain voltage of the memory cell M (voltage converted from a current corresponding to a difference between the reference current Iref and the current flowing in the memory cell M) with a reference voltage Vref delivered from a constant voltage circuit 108. If the drain voltage exceeds the reference voltage Vref, an “H” level signal is delivered. If the drain voltage is below the reference voltage Vref, an “L” level signal is delivered.
Thus, a gate voltage of the memory cell M is varied, and characteristics of the memory cell are evaluated by detecting a change in the output logic delivered via the external terminal 106.
As described above, according to Japanese Patent Application Laid-open No. Hei 11-16399, if the threshold voltage Vth of the memory cell M is a negative potential, both the test signals T1 and T2 are input, the gate voltage is controlled externally, and current flowing in the drain is measured at the external terminal 106. On the other hand, if the threshold voltage Vth of the memory cell M is a positive potential, only the test signal T1 is input, the gate voltage is controlled externally, and decision for characteristic evaluation is performed by voltage comparison using the comparator similarly to the normal mode.
However, the method of evaluating characteristics of a memory cell described in Japanese Patent Application Laid-open No. Hei 11-16399 can evaluate characteristics of the memory cell M at high speed if the threshold voltage Vth of the memory cell M is a positive potential, because the current difference between the current flowing in the memory cell M and the reference current Iref is converted into a voltage, and the voltage as the conversion result is compared with the reference voltage Vref by the comparator of the internal circuit. On the other hand, if the threshold voltage Vth of the memory cell M is a negative potential, it takes a longer period of time until the current value becomes stable because the evaluation is performed by measuring current using the external ammeter 201.
Therefore, if the threshold voltage Vth is a negative potential, it takes approximately ten times the test time in the case of a positive potential. As the memory cell capacity is larger, the manufacturing cost is higher.
For this reason, it is considered to adopt the same test method also in the case where the threshold voltage Vth is a negative potential as in the case where the threshold voltage Vth is a positive potential. In this case, it is necessary to supply a negative voltage from the external terminal 100 to the gate of the memory cell M.
However, when the test is performed, a voltage of Vss or lower (0 V if Vss is zero) cannot be applied to the semiconductor device including parasitic diodes everywhere. Therefore, if the threshold voltage Vth is a negative potential, the same test method as in the case of a positive potential cannot be used in the conventional circuit structure.